Welcome back to this series exploring the many extensions the x86 architecture has seen over the past decades. In this installment of the series, we will be looking at the successor to MMX: Streaming SIMD Extensions， or SSE for short. Most of these instructions are SIMD (as their name implies), which stands for Single Instruction Multiple Data. In brief, SIMD instructions are similar to the ones we’ve covered in the MMX article: an instruction can possibly work on multiple data groups.
SSE was introduced in 1999 with Intel’s Pentium III soon after Intel saw AMD’s “3DNow!” extension (we will cover this extension in a future installment, but right now I lack access to an AMD machine that I could use 🙂). A question arises naturally: SSE wasn’t the first SIMD set that Intel has introduced to the x86 family of processors, so why did Intel create a new extension set? Unfortunately, MMX had two major problems at the time. First, the registers it “introduced” were aliases of previously existing registers (amusingly, this was touted as an advantage for a while because of the easier context switching), this meant that floating points and MMX operations couldn’t coexist. Second, MMX only worked on integers, it had no support for floating points which was an increasingly important aspect of 3D computer graphics. SSE adds dozens of new instructions that operate on an independent register set and a few integer instructions that continue to operate on the old MMX registers.
Welcome to this series about instruction set extensions to the x86 architecture. X86 is a computer architecture that has evolved loads over the years and there have been many extensions to the original instruction set (including 64-bit “long” mode). Over the course of a few blog posts, we explore these extensions and the reasoning behind their existence.
So, the first extension I’d like to talk about is the MMX extension originally introduced with the Pentium P5 family of Intel processors in the late 1990s. Let’s dive in!
Shadow Kernels: A General Mechanism For Kernel Specialization in Existing Operating Systems
Application selectable kernel specializations by Chick et al.
Chick et al start their paper by noting that existing operating system share
one single kernel
.text section between all running tasks, and that this fact
contradicts recent research which has proved from time to time that profile
guided optimizations are beneficial. Their solution involves remapping the
running kernel’s page-tables on context switches and expose to user-space the
ability to choose which “shadow kernel” to bind its process to. The authors
have implemented their prototype using the Xen hypervisor and argue that, thus,
it can be extended to any operating system that runs on Xen.
A few months ago my colleague at Imperial College London showed me a piece of code that was part of the mandatory second-year course on Operating Systems. The code had around 5 levels of pointer indirection. That was unusual and it got me thinking. What is absolute maximum of indirection of pointers that compilers can handle?
Imperial College’s Computer Science undergraduates will be already familiar with the language WACC. It is a While-like language that is part of the mandatory 2nd-year Compilers course and the Integrated Laboratory coursework. Basically, the goal is to create a compiler for the language WACC (for which you are given a specification) in your language of choice in 4 weeks. After the initial 4 weeks, you have 2 extra weeks to implement some extensions of your own choice. Some suggested extensions range from adding fully recursive pair types, dynamic typing, all the way to garbage collection and even static analysis for dynamic types. However, there was one which we spotted fairly early on. Write an operating system.
Many times over the past few years I’ve encountered Page Faults that due to the nature of the environment, were only displayed in hexadecimal format. To make these error codes human-readable, I’ve made a quick demo to let me do just that.
Hello, world, welcome to this blog.
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